The A5PL FPGA board provides a variety of interfaces for high-speed serial I/O as well as debug support. Two QSFP+ cages are available on the front panel, each supporting 40GigE or four 10GigE channels using optical transceivers as well as passive copper cabling up to 8 meters. The QSFP+ cages can optionally be adapted for SFP+.
The Gen3 x8 PCIe interface provides 8 SerDes lanes to the Arria V GZ FPGA. A USB 2.0 interface and an optional JTAG connector are available for debug and programming support.
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